XRP7740ILB-0X18-F【PDF 13/28 页】IC REG 5OUT BCK/LINEAR 40TQFN

?2012 Exar Corporation

13/28

Rev. 1.2.2

power up. However, most users will want the part to automatically power up when power is

applied to the system. To that end there are a number of recommended solutions.

The most ideal sequencing method is to provide an RC time constant delay from DVDD to the

Enable pin. A 10kohm resistor and a 0.1uF are all that is required. If the system needs to

externally control the Enable pin as well, it is recommended that the Enable pin be pulled to ground

using an open drain I/O. Using 3.3V active logic would back feed DVDD and exceed the maximum

rated voltage of the pin.

For those using active 3.3V or 5V logic on the Enable pin an RC delay from VCCA to the Enable pin

may be used. When using an RC delay from VCCA, attention must be paid to the amount of

bypass capacitance loading AVDD since it will delay the time it takes for AVDD to power up and

regulate. The AVDD and DVDD pins do not require more than 2.2uF for proper bypassing. See

Figure 21 for the recommended components for sequencing the Enable pin through an RC delay

from VCCA. If more capacitance is added to AVDD and DVDD, the time constant must be

increased. Once Enable is asserted, an internal CHIP_READY flag goes high and enables the I

C to

acknowledge the Hosts serial commands. Channels that are configured as always-on channels are

enabled. Channels that are configured to be enabled by GPIOs are also enabled if the respective

GPIO is asserted.

Enable Pin

VCCA

10K

.1uF

Fig. 19: RC Delay for Enable taken from VCCA

In almost all cases, a simple check will ensure proper sequencing has been achieved. VCCA

regulates at approximately 4.6V when the Enable pin is logic level low and at 5.1V when Enable is

asserted. VCCA will typically power up and regulate before AVDD and because the internal logic is

not yet powered up there is no internal shutdown signal, it will regulate at 5.1V. Once AVDD has

reached sufficient voltage (and Enable is low) it will assert the internal shutdown signal and VCCA

will reduce its regulated voltage to 4.6V. When the Enable is asserted, the chip will power up and

VCCA will regulate at 5.1V. If our device is sequenced properly, VCCA will achieve 5.1V then drop

down to 4.6V and toggle back to 5.1V. See Figure 22 for an example.

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